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A 4.86 mW 15-bit 22.5 MS/s pipelined ADC with 74 dB SNDR in 90 nm CMOS using averaging correlated level shifting technique.
Tsung-Chih Hung
Tai-Haur Kuo
Published in:
A-SSCC (2016)
Keyphrases
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power consumption
analog to digital converter
power supply
hd video
nm technology
database
real time
low cost
high speed
highly correlated
higher level
low power
data flow
levels of abstraction
cmos technology