Hardware-oriented turbo-product codes decoder architecture.
Yaroslav M. KrainykVladyslav PerovMaksym MusiyenkoYevhen DavydenkoPublished in: IDAACS (2017)
Keyphrases
- turbo codes
- fpga implementation
- real time
- hardware architecture
- hardware implementation
- software implementation
- low cost
- distributed video coding
- vlsi architecture
- error control
- vlsi implementation
- reed solomon
- hardware design
- low complexity
- pipeline architecture
- host computer
- error detection
- parallel architecture
- error correction
- instruction set
- hardware and software
- ldpc codes
- life cycle
- hardware software
- dedicated hardware
- content addressable
- joint source channel
- processing units
- software architecture
- motion estimation