Low-Power Maximum Magnitude Computation for PAPR Reduction in OFDM Transmitters.
Theodoros GiannopoulosVassilis PaliourasPublished in: PATMOS (2006)
Keyphrases
- low power
- power consumption
- low cost
- high speed
- ofdm system
- power reduction
- single chip
- energy dissipation
- high power
- logic circuits
- low power consumption
- wireless transmission
- digital signal processing
- vlsi architecture
- vlsi circuits
- gate array
- delay insensitive
- power dissipation
- image sensor
- high capacity
- cmos technology
- mixed signal
- estimation algorithm
- communication systems
- real time