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Impact of On-Chip Inductor and Power-Delivery-Network Stacking on Signal and Power Integrity.

Akira TsuchiyaAkitaka HiratsukaToshiyuki InoueKeiji KishineHidetoshi Onodera
Published in: IEICE Trans. Electron. (2019)
Keyphrases
  • power consumption
  • wireless sensor networks
  • low cost
  • neural network
  • non stationary
  • computer networks
  • ibm power processor
  • frequency domain
  • high frequency
  • low power
  • high bandwidth
  • chip design
  • duty cycle