LE1: A Parameterizable VLIW Chip-Multiprocessor with Hardware PThreads Support.

David Stevens Vassilios A. Chouliaras

Published in: ISVLSI (2010)

Keyphrases

low cost
vlsi implementation
programmable logic
level parallelism
single chip
end users
circuit design
highly parallel
multithreading
evolvable hardware
high speed
real time
host computer
embedded systems
hardware implementation
scheduling algorithm
input output
computer systems