A parallel pipelined processor with conditional instruction execution.
Rod AdamsGordon B. StevenPublished in: SIGARCH Comput. Archit. News (1991)
Keyphrases
- level parallelism
- parallel architecture
- instruction set
- parallel processing
- computer architecture
- data flow
- distributed memory
- multi core processors
- parallel execution
- single processor
- multi processor
- systolic array
- multithreading
- parallel architectures
- multiprocessor systems
- shared memory
- processing elements
- instruction set architecture
- high speed
- parallel implementation
- program execution
- high end
- multimedia
- floating point
- parallel computing
- parallel programming
- distributed shared memory
- multicore processors
- memory hierarchy
- parallel algorithm
- data parallelism
- conditional probabilities
- computer systems
- linear array
- application specific
- memory bandwidth
- memory management
- graphics processing units
- floating point arithmetic
- control flow
- real time