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Post-placement C-slow retiming for the xilinx virtex FPGA.

Nicholas WeaverYury MarkovskyYatish PatelJohn Wawrzynek
Published in: FPGA (2003)
Keyphrases
  • xilinx virtex
  • hardware implementation
  • field programmable gate array
  • hardware architecture
  • embedded systems
  • parallel architectures
  • video sequences
  • software engineering
  • general purpose
  • signal processing