A Low Power and Hardware Efficient Syndrome Key Equation Solver Architecture and Its Folding with Pipelining.
Kazuhito ItoPublished in: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2015)
Keyphrases
- low power
- vlsi architecture
- low cost
- power consumption
- single chip
- high speed
- signal processor
- low power consumption
- digital signal processing
- vlsi implementation
- mixed signal
- cmos technology
- vlsi circuits
- real time
- image sensor
- high power
- hardware architecture
- hardware and software
- power reduction
- wireless transmission
- gate array
- highly efficient
- computing systems
- data flow
- long range
- embedded systems
- cmos image sensor
- digital camera
- general purpose