On increasing architecture awareness in program optimizations to bridge the gap between peak and sustained processor performance: matrix-multiply revisited.
David ParelloOlivier TemamJean-Marie VerdunPublished in: SC (2002)
Keyphrases
- instruction set
- floating point
- multi processor
- network architecture
- parallel architecture
- industry standard
- program execution
- real time
- high speed
- software architecture
- management system
- parallel processing
- floating point arithmetic
- power reduction
- multi core processors
- multithreading
- memory hierarchy
- test cases
- neural network