Delay evaluation of 90nm CMOS multi-context FPGA with shift-register-type temporal communication module for large-scale circuit emulation.
Naoto MiyamotoTadahiro OhmiPublished in: FPT (2008)
Keyphrases
- shift register
- high speed
- hardware implementation
- cmos technology
- power dissipation
- power reduction
- low cost
- data acquisition
- circuit design
- random number generator
- low power
- verilog hdl
- silicon on insulator
- vlsi circuits
- metal oxide semiconductor
- power consumption
- contextual information
- delay insensitive
- real time
- analog vlsi
- message passing
- general purpose
- co occurrence
- image processing
- real world
- field programmable gate array
- nm technology
- temporal information
- parallel processing