Power and jitter optimized VCO design using an on-chip supply noise monitoring circuit.
Yutao LiuNi XuWoogeun RheeZiqiang WangZhihua WangPublished in: APCCAS (2010)
Keyphrases
- chip design
- circuit design
- power dissipation
- evolvable hardware
- high speed
- power consumption
- physical design
- micron cmos
- power reduction
- real time
- digital circuits
- ibm power processor
- logic circuits
- single chip
- low power
- low cost
- cmos technology
- analog circuits
- vlsi implementation
- analog vlsi
- wireless sensor networks
- control system
- case study