Cache-accel: FPGA Accelerated Cache Simulator with Partially Reconfigurable Prefetcher.
Shivani ShahVaibhavi MathurSahithi Meenakshi VutakuruKavya BorraNanditha P. RaoPublished in: DSD (2021)
Keyphrases
- prefetching
- hit rate
- response time
- low cost
- data access
- main memory
- cache replacement
- access patterns
- hardware implementation
- field programmable gate array
- back end
- query processing
- caching scheme
- web documents
- signal processing
- high speed
- cache management
- digital signal
- embedded processors
- real time
- general purpose
- data structure
- systolic array