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A design methodology for a low power bang-bang all digital PLL based on digital loop filter programmable coefficients.
Sally Safwat
Maged Ghoneima
Yehea I. Ismail
Published in:
ICEAC (2011)
Keyphrases
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low power
design methodology
mixed signal
low cost
power consumption
high speed
single chip
real time
power dissipation
signal processor