A high-resolution CMOS time-to-digital converter utilizing a Vernier delay line.
Piotr DudekStanislaw SzczepanskiJohn V. HatfieldPublished in: IEEE J. Solid State Circuits (2000)
Keyphrases
- high resolution
- analog to digital converter
- circuit design
- data conversion
- low voltage
- low resolution
- high speed
- power consumption
- low power
- cmos image sensor
- image processing
- high frequency
- remote sensing
- mixed signal
- satellite images
- digital curves
- parallel processing
- high voltage
- low cost
- high quality
- field of view
- imaging systems
- high resolution images
- analog vlsi