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Area-Efficient Selective Multi-Threshold CMOS Design Methodology for Standby Leakage Power Reduction
Takeshi Kitahara
Naoyuki Kawabe
Fumihiro Minami
Katsuhiro Seta
Toshiyuki Furusawa
Published in:
CoRR (2007)
Keyphrases
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design methodology
power dissipation
power consumption
power reduction
low power
chip design
physical design
low cost
formal specification
database
high speed
artificial intelligence
energy efficiency
fuzzy neural network
energy saving