Architecture-Aware Custom Instruction Generation for Reconfigurable Processors.
Alok PrakashSiew Kei LamAmit Kumar SinghThambipillai SrikanthanPublished in: ARC (2010)
Keyphrases
- instruction set
- application specific
- memory hierarchy
- level parallelism
- hardware implementation
- parallel architecture
- parallel processing
- general purpose
- dynamic reconfiguration
- floating point
- heterogeneous computing
- general purpose processors
- systolic array
- parallel algorithm
- parallel computing
- memory access
- embedded systems
- domain specific
- low cost
- computer architecture
- parallel computers
- multi processor
- software architecture
- reconfigurable architecture
- management system
- processing units
- multithreading
- instructional design