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Alternative Direct Digital Frequency Synthesizer architectures with reduced memory size.
Dimitrios Soudris
Marios Kesoulis
Christos S. Koukourlis
Adonios Thanailakis
Spyros Blionas
Published in:
ISCAS (2) (2003)
Keyphrases
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memory size
memory space
random access
reduction method
phase locked loop
main memory
internal memory
machine learning
feature selection
external memory