A 65-nm 8T SRAM Compute-in-Memory Macro With Column ADCs for Processing Neural Networks.
Chengshuo YuTaegeun YooKevin Tshun Chuan ChaiTony Tae-Hyoung KimBongjin KimPublished in: IEEE J. Solid State Circuits (2022)
Keyphrases
- neural network
- real time
- random access
- dynamic random access memory
- auto associative
- power consumption
- pattern recognition
- computational power
- processing elements
- fuzzy logic
- memory requirements
- associative memory
- low power
- data transmission
- artificial neural networks
- data processing
- back propagation
- computing power
- genetic algorithm
- embedded dram
- random access memory
- memory size
- memory usage
- multi layer
- feed forward
- main memory
- database management systems