Memory Efficient JPEG 2000 Architecture With Stripe Pipeline Scheduling.
Hung-Chi FangYu-Wei ChangChih-Chi ChengLiang-Gee ChenPublished in: IEEE Trans. Signal Process. (2006)
Keyphrases
- memory efficient
- pipeline architecture
- iterative deepening
- multithreading
- real time
- fpga implementation
- image coding
- parallel architecture
- external memory
- scheduling problem
- scheduling strategy
- image compression
- management system
- scheduling algorithm
- resource allocation
- coding method
- compression ratio
- international standard
- structured light
- compressed domain
- multiple sequence alignment
- software architecture
- hardware implementation
- compression algorithm
- response time