Login / Signup
constant-slew-rate high-bandwidth low-voltage rail-to-rail CMOS input stage for VLSI cell libraries.
Juan M. Carrillo
J. Francisco Duque-Carrillo
Guido Torelli
José L. Ausín
Published in:
IEEE J. Solid State Circuits (2003)
Keyphrases
</>
low voltage
high speed
high bandwidth
low latency
low power
cmos technology
end to end
design considerations
high density
application specific
power management
real time
data exchange
cost effective
general purpose
power dissipation
sensor networks
multimedia