Login / Signup

Using variable clocking to reduce leakage in synchronous circuits.

Navid ToosizadehSafwat G. ZakyJianwen Zhu
Published in: ICCD (2010)
Keyphrases
  • circuit design
  • data sets
  • information retrieval
  • feature selection
  • decision making
  • learning environment
  • high speed
  • significantly reduced