A novel low power 8T-cell sub-threshold SRAM with improved read-SNM.

Sina Hassanzadeh Milad Zamani Khosrow Hajsadeghi Roghayeh Saeidi

Published in: DTIS (2013)

Keyphrases

low power
power consumption
high speed
low cost
single chip
high power
cmos technology
low power consumption
power reduction
wireless transmission
vlsi architecture
real time
logic circuits
mixed signal
power saving
digital signal processing
nm technology
power management
image sensor