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A distributed timing synchronization technique for parallel multi-core instruction-set simulation.
Meng-Huan Wu
Cheng-Yang Fu
Peng-Chih Wang
Ren-Song Tsay
Published in:
ACM Trans. Embed. Comput. Syst. (2013)
Keyphrases
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instruction set
computer architecture
level parallelism
distributed systems
floating point
parallel processing
distributed environment
floating point arithmetic
peer to peer
application specific
parallel implementation
embedded systems
shared memory
parallel execution