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A 6.4-Gb/s CMOS SerDes core with feed-forward and decision-feedback equalization.

Troy J. BeukemaMichael SornaKarl SelanderSteven J. ZierBrian L. JiPhil MurfetJames MasonWoogeun RheeHerschel A. AinspanBenjamin D. ParkerMichael P. Beakes
Published in: IEEE J. Solid State Circuits (2005)
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