Login / Signup
Realization of all logic gates and memory latch in the SC-CNN cell of the simple nonlinear MLC circuit.
P. Ashokkumar
M. Sathish Aravindh
A. Venkatesan
M. Lakshmanan
Published in:
CoRR (2021)
Keyphrases
</>
logic circuits
low power
cellular neural networks
flip flops
digital circuits
delay insensitive
logic synthesis
knowledge representation
high speed
power consumption
real time
computational power
chip design