Level Oriented Formal Model for Asynchronous Circuit Verification and its Efficient Analysis Method.
Tomoya KitaiYusuke OguroTomohiro YonedaEric MercerChris J. MyersPublished in: PRDC (2002)
Keyphrases
- formal model
- detection method
- high accuracy
- synthetic data
- significant improvement
- experimental evaluation
- computationally efficient
- high precision
- similarity measure
- genetic algorithm
- pairwise
- dynamic programming
- support vector machine
- high efficiency
- early stage
- life cycle
- clustering method
- high speed
- computational cost
- data analysis