Compression architecture for bit-write reduction in non-volatile memory technologies.
David B. DgienPoovaiah M. PalangappaNathan Altay HunterJiayin LiKartik MohanramPublished in: NANOARCH (2014)
Keyphrases
- main memory
- random access
- random access memory
- virtual memory
- memory access
- data compression
- flash memory
- memory hierarchy
- memory requirements
- associative memory
- compression scheme
- data reduction
- analog to digital converter
- read write
- seamless integration
- memory management
- key technologies
- operating system
- image compression
- management system
- data mining
- external memory
- compressed data
- file system
- hash table
- compression algorithm
- b tree
- lookup table
- pattern matching
- complexity reduction
- gray code