A Novel Reconfigurable Co-Processor Architecture.
Gaurav AggarwalNitin ThaperKamal AggarwalM. BalakrishnanShashi KumarPublished in: VLSI Design (1997)
Keyphrases
- systolic array
- computation intensive
- reconfigurable architecture
- hardware implementation
- parallel architecture
- multi processor
- functional units
- management system
- heterogeneous computing
- general purpose
- high speed
- instruction set
- industry standard
- real time
- general purpose processors
- low cost
- digital signal
- dynamic reconfiguration
- multithreading
- parallel processing
- processing elements
- data flow
- shared memory
- single processor
- network architecture
- memory management
- fpga device
- parallel processors
- single chip
- image processing algorithms