Cost-Effective and High-Throughput Merge Network: Architecture for the Fastest FPGA Sorting Accelerator.
Susumu MashimoThiem Van ChuKenji KisePublished in: SIGARCH Comput. Archit. News (2016)
Keyphrases
- cost effective
- high throughput
- network architecture
- field programmable gate array
- low cost
- data acquisition
- artificial neural
- hardware implementation
- microarray
- genome wide
- biological data
- embedded systems
- neural network
- systems biology
- parallel computing
- cost effectiveness
- genomic data
- protein protein interactions
- neural network model
- dna sequencing
- high speed
- real time
- gene expression
- artificial neural networks
- proteomic data
- network infrastructure
- mass spectrometry data
- environmentally friendly
- data center
- low latency
- living cells
- analysis of gene expression