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A 40-nm 144-mW VLSI processor for real-time 60-kWord continuous speech recognition.
Guangji He
Takanobu Sugahara
Tsuyoshi Fujinaga
Yuki Miyamoto
Hiroki Noguchi
Shintaro Izumi
Hiroshi Kawaguchi
Masahiko Yoshimoto
Published in:
ASP-DAC (2013)
Keyphrases
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continuous speech recognition
real time
high speed
single chip
vlsi architecture
low power
signal processing
power consumption
control system
real time systems
vision system
hd video
chip design
vlsi implementation
parallel processing
data acquisition
quality of service