Login / Signup
Serial-Link Bus: A Low-Power On-Chip Bus Architecture.
Maged Ghoneima
Yehea I. Ismail
Muhammad M. Khellah
James W. Tschanz
Vivek De
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2009)
Keyphrases
</>
high speed
low power
mixed signal
vlsi architecture
cmos technology
low cost
single chip
nm technology
power consumption
low power consumption
signal processor
real time
vlsi circuits
high power
digital signal processing
wireless transmission
cmos image sensor
image sensor
power dissipation
logic circuits
hardware implementation
focal plane
power reduction
power management
gate array
design considerations