A compact and low-power SRAM with improved read static noise margin.
Cihun-Siyong Alex GongCi-Tong HongKai-Wen YaoMuh-Tian ShiueKuo-Hsing ChengPublished in: ICECS (2008)
Keyphrases
- low power
- power consumption
- low cost
- high speed
- single chip
- wireless transmission
- low power consumption
- energy dissipation
- digital signal processing
- vlsi architecture
- cmos technology
- logic circuits
- vlsi circuits
- high power
- power reduction
- noise model
- mixed signal
- real time
- signal processor
- ultra low power
- power saving
- image sensor
- noise level