Low Power Pulse-Triggered Flip-Flop Based on Clock Triggering Edge Control Technique.

Ji-Zhong Shen Liang Geng Xue-Xiang Wu

Published in: J. Circuits Syst. Comput. (2015)

Keyphrases

low power
power consumption
high speed
power dissipation
low cost
cmos technology
single chip
low power consumption
vlsi circuits
high power
digital signal processing
flip flops
control system
image sensor
wireless transmission
vlsi architecture
control method
edge detection
real time
gate array
ultra low power