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Design of a 2-GS/s 8-b self-calibrating ADC in 0.18µm CMOS technology.

Cristiano AzzoliniAndrea BoniAlessio FacenMatteo ParentiDavide Vecchi
Published in: ISCAS (2) (2005)
Keyphrases
  • cmos technology
  • power consumption
  • low power
  • power dissipation
  • user interface
  • single chip
  • real time
  • image processing
  • case study
  • spl times
  • analog to digital converter