Simultaneous peak and average power minimization during datapath scheduling for DSP processors.
Saraju P. MohantyN. RanganathanSunil K. ChappidiPublished in: ACM Great Lakes Symposium on VLSI (2003)
Keyphrases
- parallel processors
- list scheduling
- power reduction
- power consumption
- communication delays
- multiprocessor systems
- signal processing
- scheduling problem
- parallel processing
- multithreading
- standard deviation
- digital signal processing
- digital signal processor
- parallel algorithm
- parallel machines
- round robin
- flexible manufacturing systems
- single processor
- power saving
- computational power
- scheduling algorithm
- objective function
- clock frequency
- memory subsystem
- high end
- parallel execution
- real time database systems
- image processing
- resource constraints
- resource allocation
- response time
- database systems