Jitter and 0.98-1.06 mW/GHz in 65-nm CMOS.
Jaya Deepthi BandarupalliSaurabh SaxenaPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2022)
Keyphrases
- power consumption
- nm technology
- cmos technology
- end to end delay
- low power
- hd video
- power supply
- high speed
- silicon on insulator
- packet loss
- clock frequency
- power reduction
- power dissipation
- power management
- video transmission
- metal oxide semiconductor
- low voltage
- high definition
- single chip
- vlsi circuits
- frequency band
- high frequency