A 3.2 Gbps/pin 8 Gbit 1.0 V LPDDR4 SDRAM With Integrated ECC Engine for Sub-1 V DRAM Core Operation.

Tae-Young Oh Hoeju Chung Jun-Young Park Ki-Won Lee Seung-Hoon Oh Su-Yeon Doo Hyoung-Joo Kim ChangYong Lee Hye-Ran Kim Jong-Ho Lee Jin-Il Lee Kyung-Soo Ha Young-Ryeol Choi Young-Chul Cho Yong-Cheol Bae Taeseong Jang Chulsung Park Kwang-Il Park Seong-Jin Jang Joo-Sun Choi

Published in: IEEE J. Solid State Circuits (2015)

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