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A Multi-Mode Power Gating Structure for Low-Voltage Deep-Submicron CMOS ICs.
Suhwan Kim
Stephen V. Kosonocky
Daniel R. Knebel
Kevin Stawiasz
Marios C. Papaefthymiou
Published in:
IEEE Trans. Circuits Syst. II Express Briefs (2007)
Keyphrases
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low voltage
power consumption
power management
low power
design considerations
cmos technology
power line
vlsi circuits
image sequences
learning environment
low cost
high speed
reactive power