A new FPGA-based postprocessor architecture for channel mismatch correction of time interleaved ADCS.

Asgar Abbaszadeh Khosrov Dabbagh-Sadeghipour

Published in: SiPS (2009)

Keyphrases

hardware design
hardware architecture
hardware implementation
management system
hardware architectures
neural network
real time
data sets
image processing
case study
software architecture
end to end
network architecture
smart camera