3D-ISC: A 65nm 3D Compatible In-Sensor Computing Accelerator with Reconfigurable Tile Architecture for Real-Time DVS Data Compression.
Gokul KrishnanGopikrishnan Raveendran NairJonghyun OhAnupreetham AnupreethamPragnya Sudershan NallaAhmed HassanInjune YeoKishore KasichainulaJae-sun SeoMingoo SeokYu CaoPublished in: A-SSCC (2023)
Keyphrases
- data compression
- real time
- low cost
- data reduction
- compression algorithm
- compression ratio
- smart camera
- compressed data
- compression scheme
- hardware implementation
- wavelet compression
- mixed data
- high compression
- signal processing
- sensor networks
- image processing
- energy consumption
- image quality
- parallel implementation
- wavelet filters
- arithmetic coding
- huffman coding
- compute intensive