Design and Analysis of FinFET Based CSCPAL Low Power Adder.

Jayashree K. G Lois Priscilla S Bhuvana B. P.Kanchana Bhaaskaran V. S

Published in: iSES (2019)

Keyphrases

low power
logic circuits
power consumption
single chip
high speed
power dissipation
vlsi architecture
low cost
digital signal processing
low power consumption
cmos technology
gate array
power reduction
high power
ultra low power
image processing