Inverse Gaussian distribution based timing analysis of Sub-threshold CMOS circuits.
Jiaoyan ChenSorin CotofanaSatish GrandhiChristian SpagnolEmanuel M. PopoviciPublished in: Microelectron. Reliab. (2015)
Keyphrases
- logic circuits
- gaussian distribution
- low power
- power dissipation
- power consumption
- high speed
- low cost
- maximum likelihood
- logic synthesis
- noise model
- cmos technology
- gaussian mixture model
- single chip
- expectation maximization
- maximum a posteriori estimation
- intensity distribution
- vlsi circuits
- delay insensitive
- image processing
- gaussian model
- multi variate
- chip design
- circuit design
- training data
- image segmentation