POCO: Hardware Characterization of Activation Functions using POSIT-CORDIC Architecture.
Mahati BasavarajuVinay RayapatiMadhav RaoPublished in: ISCAS (2024)
Keyphrases
- activation function
- neural architecture
- fpga implementation
- hardware implementation
- network architecture
- digital computer
- real time
- hardware architecture
- neural network
- feed forward
- hidden layer
- back propagation
- field programmable gate array
- neural nets
- basis functions
- processing elements
- processing units
- artificial intelligence
- artificial neural networks
- training phase
- decision making
- learning algorithm
- efficient implementation