C
search
search
reviewers
reviewers
feeds
feeds
assignments
assignments
settings
logout
Register Transfer Level Approach to Hybrid Time and Hardware Redundancy Based Fault Secure Datapath Synthesis.
Kaijie Wu
Ramesh Karri
Published in:
ITC (2003)
Keyphrases
</>
low cost
real time
application level
fault detection
levels of abstraction
trusted computing
image processing
embedded systems
computing systems
hardware design
hardware architecture
real time embedded systems