Circuit/architecture for low-power high-performance 32-bit adder.
I. S. Abu-KhaterAbdellatif BellaouarMohamed I. ElmasryRan-Hong YanPublished in: Great Lakes Symposium on VLSI (1995)
Keyphrases
- low power
- logic circuits
- power dissipation
- nm technology
- signal processor
- cmos technology
- high speed
- power consumption
- vlsi architecture
- low power consumption
- flip flops
- low cost
- mixed signal
- single chip
- power reduction
- gate array
- wireless transmission
- vlsi circuits
- high power
- real time
- digital signal processing
- analog to digital converter
- data flow
- delay insensitive
- design methodology
- image sensor
- low voltage
- cmos image sensor
- digital circuits
- vlsi implementation