A novel MUX-FF circuit for low power and high speed serial link interfaces.
Wei-Yu TsaiChing-Te ChiuJen-Ming WuShuo-Hung HsuYarsun HsuPublished in: ISCAS (2010)
Keyphrases
- low power
- high speed
- logic circuits
- cmos technology
- gate array
- single chip
- high power
- wireless transmission
- vlsi circuits
- power dissipation
- frame rate
- vlsi architecture
- digital signal processing
- power consumption
- low power consumption
- power reduction
- real time
- delay insensitive
- gigabit ethernet
- signal processor
- nm technology
- ultra low power
- mixed signal
- data flow