Hardware design of a low complexity, parallel interleaver for WiMax duo-binary turbo decoding.
Maurizio MartinaMario NicolaGuido MaseraPublished in: IEEE Commun. Lett. (2008)
Keyphrases
- low complexity
- turbo codes
- distributed video coding
- hardware design
- decoding complexity
- error resilience
- hardware implementation
- computational complexity
- motion estimation
- rate allocation
- bit plane
- error correction
- parallel processing
- channel coding
- wyner ziv
- massively parallel
- low density parity check
- parallel computing
- field programmable gate array
- real time
- transform domain
- coding scheme
- machine learning
- wireless channels
- video streaming
- shared memory
- end to end
- image processing