Power aware SID-based simulator for embedded multicore DSP subsystems.
Cheng-Yen LinPo-Yu ChenChun-Kai TsengChung-Wen HuangChia-Chieh WengChi-Bang KuanShih-Han LinShi-Yu HuangJenq Kuen LeePublished in: CODES+ISSS (2010)
Keyphrases
- signal processing
- simulation model
- power consumption
- digital signal processing
- embedded systems
- data sets
- information retrieval
- computer vision
- digital signal processor
- power distribution
- computer systems
- computational power
- computing power
- level parallelism
- database
- parallel programming
- watermarking algorithm
- parallel processing
- high speed
- information systems
- genetic algorithm