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CMOS scaling into the 21st century: 0.1 µm and beyond.
Yuan Taur
Yuh-Jier Mii
David J. Frank
H.-S. Philip Wong
Douglas A. Buchanan
Shalom J. Wind
Stephen A. Rishton
Watson A. Sai-Halasz
Edward J. Nowak
Published in:
IBM J. Res. Dev. (1995)
Keyphrases
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st century
high speed
power consumption
low cost
early years
experiential learning
low power
image sensor
educational technology
learning in higher education
power supply
analog vlsi
formal education
circuit design
knowledge management
information technology
delay insensitive
case study
information systems