Design of Artificial Neuron Network with Synapse Utilizing Hybrid CMOS Transistors with Memristor for Low Power Applications.
V. Keerthy RaiR. SakthivelPublished in: J. Circuits Syst. Comput. (2020)
Keyphrases
- low power
- cmos technology
- power consumption
- single chip
- high speed
- low cost
- low power consumption
- vlsi architecture
- logic circuits
- digital signal processing
- ultra low power
- mixed signal
- nm technology
- power dissipation
- gate array
- circuit design
- high power
- vlsi circuits
- power reduction
- power saving
- low voltage
- image sensor
- cmos image sensor
- neural network
- delay insensitive
- design process
- analog to digital converter
- digital camera
- flip flops